1 Field of the Invention
This invention relates to semiconductor device manufacturing and more particularly to determining the position of a given semiconductor die relative to other dice formed from the same semiconductor wafer.
2. Description of the Relevant Art
Several semiconductor devices (e.g., integrated circuits) are typically formed upon a single semiconductor wafer during a series of semiconductor wafer fabrication operations. A semiconductor wafer has two opposed and substantially planar sides; a frontside surface and a backside surface. After a single-crystal ingot of a semiconductor material (e.g., silicon) has been grown, the ingot is sliced to form multiple wafers. A sequence of shaping and polishing steps are performed upon each wafer in order to produce frontside surfaces suitable for fabricating semiconductor devices. In contrast, the backside surfaces are typically subjected to mechanical damage by abrasion, grooving, or sandblasting during wafer manufacture in order to enhance the use of the frontside surface for the fabrication of semiconductor devices.
During wafer fabrication, the frontside surface of a semiconductor wafer is partitioned into rows and columns, forming separate die areas on the frontside surface. One or more semiconductor devices are formed within these die areas using a complex sequence of layering, patterning, doping, and heat treatment processes. Following wafer fabrication, the semiconductor devices formed within each die area are tested for proper operation. Die areas containing non-functional semiconductor devices are identified and either physically marked (e.g., with a drop of ink) or noted by an appropriate entry in a computer database. The semiconductor dice or "chips" are then separated from the semiconductor wafer by sawing between the defined die areas. Following an optical inspection to ensure the operational dice were not damaged during the sawing operation, each semiconductor die containing operational semiconductor devices is mounted within a protective semiconductor device package.
In order to increase the number of functional semiconductor devices produced using a given wafer fabrication process, semiconductor device failures must be diagnosed and corrective actions taken. The causes of such failures must be traced to a particular step in the wafer fabrication process, and preferably to a particular piece of equipment carrying out a particular operation. Such failure analysis is often possible only when a failed semiconductor device can be traced to the semiconductor wafer from which it was formed. Some failure mechanisms result in semiconductor device failures which are more prevalent in certain areas of the semiconductor wafer than in others. Such failure patterns are often distinctive, thereby helping to identify the cause. In these cases, the position of a failed semiconductor die relative to other semiconductor dice formed from the same semiconductor wafer is very valuable information.
Special markings are typically formed within each die area so that the wafer from which a selected semiconductor die was formed may be identified following separation of the die from the wafer. Such markings may be visually interpreted when viewed through a microscope or interpreted by a machine (e.g., a laser bar code reader). Optical interpretation by human or machine requires time to carefully align the semiconductor die for observation of the special markings. As a result, optical interpretation is a relatively slow process. In addition, user interpretation is subject to human error which increases with user fatigue.
It would be beneficial to have a method and apparatus for identifying a selected semiconductor die which involves electrical rather than optical interpretation. The desired electrical identification would not require careful alignment of a selected semiconductor die, resulting in a faster identification process. User interpretation would preferably not be required, eliminating the opportunity for human error.